Improved Symbolic Verification Using Partitioning Techniques

This paper presents an efficient method to avoid memory explosion in symbolic model checking through the use of partitioning techniques. Dynamic repartitioning of Partitioned OBDDs (POBDDs) is investigated to enhance the efficiency of symbolic verification techniques. New and improved algorithms are presented for reachability based invariant checking and for model checking a fraction of CTL that is found to be most important in practice. These algorithms hinge on dynamically repartitioning the state space and exploit the partitioned nature of the data structure. The effectiveness of the partitioning approach is demonstrated on both proprietary industrial designs as well as public benchmark circuits. Notably, the approach is able to verify, and in some cases falsify, properties of interest in industry on large designs which were otherwise intractable for verification by other state-of-the-art tools.